Les journées se dérouleront à l’auditorium du bâtiment IMAG, Grenoble, du 20 au 22 mars 2023
CLAP-HiFi-LVP 2023 : Journées des GT CLAP, HiFi et LVP du GDR GPL du CNRS
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Workshops and Conferences
- 20 years of Verimag, September
- PERSYVAL-Lab Summer School (…)
- ACES’2008 September 29th, (…)
- ADSL 2018
- ADSL 2020 (@POPL 2020)
- AlgoTel 2017
- AlgoTel et CoRes 2020
- ARCH14
- ARTIST Summer School in (…)
- ARTIST2 Summer School 2008 (…)
- ASL 2022 : Advances in Separat
- AVM 2014
- AVoCS 2019
- BEeSy 2015
- CAPITAL Workshop - sCalable
- CAS 2012, January 13, Grenoble
- CAV 2009 June 26 - July (…)
- EMSOFT 2009 October 12 - (…)
- ETAPS 2014
- Euro-Par 2016
- FAC 2014
- FIMCP 2013, May 2nd, Marrakech
- FORMATS 2014
- FORMATS 2015
- GreHack 2016
- GT Verif 2018
- HSB 2014
- HSCC 2012, Apr 17-19, Beijing
- ICDCN 2012, January 3-6, (…)
- IWHSB 2013
- Journée informatique frugale
- MEMOCODE 2010, July 26-28,
- MEMOCODE 2011, July 11-13, (…)
- MeTRiD 2018
- MOVEP 2020
- RESSI 2017
- RTNS 2017
- RV 2018
- SSS 2020
- SSS’2011, October 10-12, (…)
- SSS’2016
- Synchron 2019
- SynCoP 2014
- Toward Systems Biology 2011,
- VECoS 2018
- VVS
- WCET 2013, July 9, 2013, (…)
- WFAC’2008 - October 19th, (…)
- Workshop CAPITAL
- Workshop CAPITAL 2022: sCalab
- Workshop on Timing Anomalies
- RESSI 2017 : les Rendez-vous
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New publications
- Some Recent Publications
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
- Karine Altisen, Stéphane Devismes, Erwan Jahier: sasa: a SimulAtor of Self-stabilizing Algorithms
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne: A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
- Sylvain Boulmé: Construire des logiciels fiables
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences