SSS is an international forum for researchers and practitioners in the design and development of distributed systems with self-* properties: (classical) self-stabilizing, self-configuring, self-organizing, self-managing, self-repairing, self-healing, self-optimizing, self-adaptive, and self-protecting. Research in distributed systems is now at a crucial point in its evolution, marked by the importance of dynamic systems such as peer-to-peer networks, large-scale wireless sensor networks, mobile ad hoc networks, cloud computing, robotic networks, etc. Moreover, new applications such as grid and web services, banking and e-commerce, e-health and robotics, aerospace and avionics, automotive, industrial process control, etc. have joined the traditional applications of distributed systems. The theory of self-stabilization has been enriched in the last 30 years by high quality research contributions in the areas of algorithmic techniques, formal methodologies, model theoretic issues, and composition techniques. All these areas are essential to the understanding and maintenance of self-* properties in fault-tolerant distributed systems.
SSS’2011, October 10-12, Grenoble
13th International Symposium on Stabilization, Safety, and Security of Distributed Systems
View online : SSS’2011
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- 28 November 2024 Grégoire Bussone: Reducing copies and memory consumption in synchronous languages
- 2 December 2024 Thomas Vigouroux: Quantitative analysis for adaptive attackers (Phd)
- 12 December 2024 Lucas Bueri: Tba (Phd)
- 12 December 2024 Bob Aubouin-pairault: (Phd)
New publications
- Some Recent Publications
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing synchronous unison in directed networks
- Erwan Jahier, Karine Altisen, Stéphane Devismes, Gabriel B. Sant'Anna: Model Checking of Distributed Algorithms using Synchronous Programs
- Florence Maraninchi: Revisiting "Good" Software Design Principles To Shape Undone Computer Science Topics
- Léo Gourdin: Lazy Code Transformations in a Formally Verified Compiler
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- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences