@phdthesis{Rie4,
title = { On Forcing and Classical Realizability },
author = {Rieg, Lionel},
month = {Jun},
year = {2014},
type = {Theses},
number = {2014},
school = {{{\'E}cole normale sup{\'e}rieure de {L}yon}},
team = {Ens de Lyon, Other},
}
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- Iulia Dragomir, Carlos Redondo, Tiago Jorge, Laura Gouveia, Iulian Ober, Marius Bozga, Maxime Perrotin: Specification and model-checking of space systems in the TASTE toolset
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian: Modeling Techniques for the Formal Verification of Integrated Circuits at Transistor-Level: Performance vs. Precision Trade-offs
- Akram Idani, Yves Ledru, German Vega: Formal model-driven security combining B-method and process algebra: The B4MSecure platform
- Bruno Ferres, Oussama Oulkaid, Matthieu Moy, Gabriel Radanne, Ludovic Henrio, Pascal Raymond, Mehdi Khosravian: A Survey on Transistor-Level Electrical Rule Checking of Integrated Circuits
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- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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