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- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian: Modeling Techniques for the Formal Verification of Integrated Circuits at Transistor-Level: Performance Versus Precision Tradeoffs
- Marius Bozga, Radu Iosif, Arnaud Sangnier, Neven Villani: Counting Abstraction and Decidability for the Verification of Structured Parameterized Networks
- Akram Idani, Yves Ledru, German Vega: Formal model-driven security combining B-method and process algebra: The B4MSecure platform
- Iulia Dragomir, Carlos Redondo, Tiago Jorge, Laura Gouveia, Iulian Ober, Marius Bozga, Maxime Perrotin: Specification and model-checking of space systems in the TASTE toolset
