1st International Workshop on Model Based Architecting and Construction of Embedded Systems, ACES’2008 September 29th, 2008 Toulouse, France (in conjunction with MODELS 2008)
ACES’2008 September 29th, 2008 Toulouse, France
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- 28 November 2024 Grégoire Bussone: Reducing copies and memory consumption in synchronous languages
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- David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel: Testing a Formally Verified Compiler
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Pour battre à l'unisson, il faut que tous les chemins viennent de Rome
- Florence Maraninchi: Quelle recherche en informatique pour un numérique inscrit dans les limites planétaires ?
- Sylvain Boulmé: Construire des logiciels fiables
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- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
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- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences